Affichage des articles dont le libellé est GoWin FPGA. Afficher tous les articles
Affichage des articles dont le libellé est GoWin FPGA. Afficher tous les articles

jeudi 14 juillet 2022

GoWin FPGA & the Wichit Sirichote's µPF--1 clone : subject closed


This time, it's said. I close the topic 'µPF--1 clone'

Why? Because it works.


A few years ago, when I set out to attempt to replicate Wichit Sirichote's work in FPGAs, I developed a minimal system based on the sources of Wichit Sirichote. It had already taken me quite a bit of time to translate all the hardware onto a commercial FPGA board, then develop a personal board to accommodate an FPGA module. I found that it would have taken me too long to re-write a complete system based on poor quality of the source provided. 

And then, I wanted to test the GoWin FPGAs. When I say testing, I mean creating an FPGA board and then programming a complete system. That is to say also test the GoWin development tools.

Free advertising ;-)

After seeing that the small computer created 'seems' to work fine. I decided to attack what is the center of interest of such a small computer, namely the operation in step by step.

Until then, I had contented myself with re-writing the source of Wichit Sirichote to allow the manipulation of addresses and data as well as the loading of programs by serial link. So I missed the step by step. In terms of real learning of processor operation, step by step is extremely interesting!

It's quite interesting to be able to modify a program value almost on the fly, then to check the result by immediately restarting the program. That's the whole point of such a computer. 

It's a personal opinion, but I find it much more relevant than working on Arduino modules as a discovery of computing.

The system set up for step by step operation is based on an interrupt triggered after a certain number of pulses of the signal M1. Interesting and very functional system. On this point, Wichit Sirichote's source served me well.

So there you go, I have everything set up except the 'REL' key. I couldn't figure out its usefulness, even studying the provided source well. Regardless, it is now possible to write an entire program by directly entering the processor codes, or more simply by loading the program via the serial link and modifying the code directly on the keyboard, starting then stopping the program to check the content of processor registers etc etc...

Small example of a program loaded via the serial link:


The system is therefore validated. The GoWin FPGA used works perfectly. It is a success. I forgot, the serial link works perfectly, here at 115200 Bauds, and not faulty at 1200 Bauds as on Wichit Sirichote's system ;-)

In terms of FPGA resource usage, this is what it looks like:

Barely more than half of the resources in logic gates. I haven't implemented expansion port management, but it only takes a few dozen logical units. Not bad at all!

What's next?

I will now try to set up an HDMI output based on these Gowin FPGAs. Because I would like to develop a real computer with screen and keyboard on which it would be possible to choose the type of processor wanted.

This kind of machine has already been built, notably by Jeri Ellsworth in 2002. It's been just 20 years. It did not meet with much success while the retro-computing craze started to really emerge from the 2010s.


This machine may have come out too soon...

Stefany Allaire is currently recreating a whole range of computers on the same principle. You can visit his website c256foenix.com particularly with regard to its new C256 FOENIX JUNIOR, based on a 6.29MHz WDC W65C02S processor :

Free advertising ;-)

I am really impressed with the quality of his work...

[ 07-16-2022) Small updateAnd now the test with the IOM MPF-1P expansion board.

In fact, I knew that testing the connection of my processor board on the IOM board was going to pose a potential problem. simply because a number of signals used to manage the expansion port are also used for the JTAG programming interface. 

In fact it is not that complicated. All that is needed is to dynamically control the FPGA programming management system. Once done, the operation of the external bus is instantaneous. The connection of the IOM is therefore completely normal. I completed my little test program to turn on the diodes on the IOM board. It works without any problem!


GREAT :-)


The 'funniest' part of the story is that while I added some logical ressources to manage the expansion port, the GoWin software summary report tells me a 50% logical resources usage . It was 52% previously:


I could put two systems like this in the used FPGA considering only the logic resources. However, I wouldn't have enough internal memory for that...

[ 07-18-2022) Small update : For fun, I also connected the small printer, here the PRT-1P model to my processor board :


It seems to work. Why do I say 'seems'? Because I don't own thermal paper. So I can not check if the message is printed correctly. All I can say is that the printer responds correctly to requests made through routines present in the ROM integrated onto the printer board.

I have no idea where to get thermal paper for this machine. Occasionally, I'll try to find some...

mardi 12 juillet 2022

GoWin FPGA & the Wichit Sirichote's µPF--1 clone.

I've been testing the Wichit Sirichote's µPF--1 compatible development board for a few years now.


Here are all the studies carried out around this system:
  • 2017 - Achievement of the kit with the basic system available in 2017.
  • 2018 - Attempted modification with the system update: large number of malfunctions including the serial link.
  • 2019 - Study of the system on a commercial FPGA board. Modification of the code for a functional serial link.
  • 2020 - Realization of a personal board based on Intel FPGA and installation of the system with the operation of the serial link corrected.
  • 2022 - Porting VHDL code to GoWin FPGA. The goal is to test the operation of these new FPGAs.

Until now, I had only taken care of the rewriting of the code of Wichit Sirichote concerning the operation of the serial link. I had not particularly tested the other functions of the monitor other than those relating to the ADDR and DATA keys, allowing the contents of a memory address to be viewed, and to be modified if necessary.

On the occasion of the transition to the GoWin FPGA, I decided to test all the keys allowing autonomous operation of the system. And there, big surprise. The code is buggy everywhere!!!

Until now I thought the problems were mostly around the serial port. actually no. I almost have to re-write the whole system.

In fact: Wichit Sirichote provides the Hexa file of the first version of the system. The source is only provided for the latest version, the one where the serial port does not work.

After having worked hard on this source code, I think that this source is in fact a very first development version and does not correspond to the first version provided, nor to the very last one.

If the source provided allows you to get a good idea of ​​how the system works, it is so badly written and so dysfunctional that everything has to be rewritten.


Even getting to this error message (generated on purpose for the photo), it wasn't easy. I chose an end address lower than the start address for the memory block copy function. What generates this error!

In a nutshell: Wichit Sirichote's idea was very good. But do not try to draw inspiration from the sources provided to make your own monitor. It's a guaranteed waste of time. It is better to develop your own monitor from scratch!

Apart from the REL key, the function of which I am unable to determine what it does, even from the source, all the functions except the DUMP and the LOAD are functional. In particular the step-by-step function which involves the use of the NMI interrupt of the processor.

It only remains for me to implement the serial link for the LOAD/DUMP function in the FPGA and to copy all the modifications that I have already made to the source concerning the management of this serial port.

I wanted to see if I could make the same type of system with the GoWin FPGAs as with those from Intel that I usually use. I must say the result is absolutely perfect.

I had to write a small utility to provide the RAM initialization file in GoWin format. Nothing too complicated to do. Thereafter, the development procedure is carried out in the same way as with the Quartus development chain.

I will quietly finalize the development of this system and will test everything concerning the HDMI outputs because GoWin seemed to provide this type of output on its FPGAs. In fact, now that I'm in a position to develop a relatively complex but basic system, I would really try to build a more standard small computer, i.e. with a normal keyboard and video output...

I had to develop a Drumulator clone, but given the power of these FPGAs, I'm going directly to develop an SP12 or SP1200 clone. As I tested all the sub-elements of the Drumulator, it shouldn't be too complicated to get started with the SP12/SP1200 since it's exactly the same operating principle, but in 12 bits...