mardi 23 juillet 2024

Trion FPGAs

Getting started with the Trion FPGA.

For the past few days, I have been trying to operate a minimal Z80 system with the aim of implementing the entire logic part of the Drumulator in a TRION type FPGA.

I will spare you the details of the necessary 'acclimatization' to a new development environment, both hardware and software. As far as I am concerned, this stage is always long and tedious for me, which is why I have never been 'pushed to study', as they say back home. (This is not the only reason, but it is 'technically', the main pretext used for exclusion from the French school system).

So, it is absolutely necessary for me to understand what I am doing. I started from the base, namely a system just capable of producing the 'famous' Hello World of electronics, namely, the flashing of LEDs. A small 'complaint' on the Efinix dev board, it does not include the minimum amount of hardware capable of producing an 'intelligent' display. No digital displays, nor LCD: too bad. You must therefore make do with the 8 basic LEDs present on the circuit.

I will therefore reproduce the animation, but with only one LED lit at a time', supplied as a demo program with the board.

In order to test the concept a little in depth, I decided to implement the LED output register as a memory register AND standard IO type output. So I produced a 'quick & dirty' conditional code allowing me to test both implementations.

(the code of death)

Regarding the equivalent VHDL code to select the LED output either in memory register mode or in out mode in the I/O zone, simply modify the code selecting the LED output register like this:



Not very complicated either!

Oh good? And several days for that? Absolutely. I had made some clock synchronization errors which meant that at the default speed, high clock speed, the system could not operate. Obviously, I then had to carry out debugging by testing the entire operating chain of such a minimum system. I could have used internal debugging, but I have to say that the Efinity development software is not really well integrated. It does not offer a signal shape viewer like GTK WAVE to display the result of an execution. In a nutshell, I didn't want to spend time trying to get difficult-to-install external free tools to work. I could also have used the I/O ports on the dev board and plugged in a logic analyzer. I have a logic analyzer on PC, but I really don't like its interface at all. And overall, I support these Windows-based systems less and less.

Additionally, I also 'wasted' time trying to figure out the file format needed to fill the BRAM area used in ROM with the 'C' code binary. In fact, the file to produce is much simpler than the Efinix documentation suggests. As is often the case, they explain the internal workings of filling the BRAM, while taking care not to correlate the explanation with a real example. So, it's pretty easy to understand how this is supposed to work internally, but gives absolutely no information about how it relates to the real world. So, it's quite complicated to understand how to simply present the binary file. The typical kind of documentation provided by Microsoft: drowning the person looking for it under a mountain of doc that ultimately has nothing to do with the question. The result is simple, the graphical interfaces supplied with small development systems are no longer updated, or work in Windows 7 mode, as long as it works. Microsoft had already 'gunned' the small structures which provided even professional software solutions in DOS and Basic, at the beginning of the 90s. Microsoft is now euthanizing all the medium structures which still work (or still try to do so) with Windows. Great!

In the end: I obviously managed to make this minimal system based on Z80 work. The Efinity software also tells me that I can potentially make it work at more than 60MHz. So I tried to power all the logic directly with the 50MHz oscillator placed on the test board, and indeed, the result is completely functional.



A few seconds of illustration of how this first test works:






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