Drumulator OS : done!

And yes, the Drumulator system is finally working in the Trion FPGA. Actually, I managed to get the Drumulator system running in an FPGA—Altera at the time—a few years ago already, but by simulating only one interrupt on CTC channel 1, the channel responsible for scanning the display and keyboard.

I knew from then on that to properly implement this drum machine's system, I had to fully and correctly implement the Zilog CTC in the FPGA. Meaning with the entire IRQ recognition system, interrupt vector delivery, and IRQ enable management.

In the meantime, I turned my attention to other, easier subjects. And then, after experimenting with GoWin FPGAs, I decided to switch to Efinix circuits—simply because they are much cheaper than GoWin ones. 

And I have to say, the philosophy behind Efinix's development system actually suits me well. For example, I had never implemented a fast 'proprietary processor' in an FPGA before. I was able to implement Efinix's Saphir processor without much difficulty. The only small point that gave me some trouble was implementing the JTAG interface for this soft processor. Afterwards, I tried using the debugging tools in the Efinix software without success. Once again, I was referring to other FPGA manufacturers and looking for a similar approach. Then one day, without really overthinking it, I simply set up a debug session and launched the built-in logic analyzer. These tools are very simple to use and effective.

After that, I wondered which tool to use to visualize the captured signals. GTKWave—and it's perfect:

I was able to test the CTC's operation using the internal Saphir processor I had implemented, by sending configuration data and observing the CTC's behavior. I was aware that I couldn't test everything—especially the Z80 system's interrupt recognition and acknowledge mechanism. That's where the internal logic analyzer proved to be extremely helpful. It allowed me to verify signal timing, which is essential in a system that uses multiple interrupts coming from the same source.

Still, the system behavior remained completely erratic. But I knew that an uninitialized data RAM could cause the system to go haywire.

So I pre-initialized the data RAM to 0xFF, and this time the system seemed stable. In order to properly format the loading data—whether for ROM or RAM—I wrote a small utility to easily process the required files:

Since I hate wasting time with Microsoft tools that don't address standard needs at all, require years of learning, and stray far from real-world issues, I simply asked the AI to generate the skeleton. I got it in about 30 minutes—just enough time to clarify a few points and let the AI algorithm adapt. And there it is!

At that point, all I had left to do was connect the keyboard and test the Drumulator's initialization sequence: ERASE / CASSETTE / ENTER.

And voilà — the data RAM properly initialized, and a Drumulator running flawlessly.

I still need to implement the data potentiometer control system, since it also uses the CTC. And knowing that I've already implemented the drum machine's waveform sequencer, I can now say I have all the fundamental building blocks to rebuild a Drumulator — and hopefully improve it in one way or another.

At startup, the unit should display 01E, as shown in this image taken from the web:

And here is the result on the control panel I created for testing:

The photo isn't great, but hey, the main thing is there ;-)

I tested a few possible actions using the user manual. The display behaves exactly as described in the manual. So I now consider the implementation of the Drumulator core in FPGA to be validated.

And if I sum up the work done over the past two or three months:

• Development of a minimal VGA interface prototype.
• Development of the MSX cartridge prototype (PCB prototype in progress).
• Porting of the Drumulator core to FPGA.

All of this on Efinix Trion FPGAs — I'm quite pleased with myself!

Various early-year updates. MSX cartridge & Drumulator.

Currently, I am working on two major projects. 

On one hand, there's the development of an MSX cartridge based on an FPGA. After several attempts to create this type of cartridge using different processors, I decided to switch to an FPGA. The task is quite complex as it involves being able to download an executable cartridge file from a PC, program the FLASH memory, and then make it accessible to the MSX once the programming is complete. I have, of course, already built a functional prototype using an Efinix FPGA. The results are very promising. So now I'm moving on to the hardware production of the cartridge. I have made FPGA boards before, but they were based on GoWin FPGAs. This is my first attempt with an Efinix Trion FPGA.

For now, I have just finished placing the components. This may not be the final version. I haven't routed the traces yet, so if I can't arrange the tracks properly, I may need to reposition some components. Basically, here's what it might look like:

The advantage of this version over the older processor-based ones is that now I will also be able to implement different types of mappers, and there is a good amount of RAM available. In fact, if there is space left after routing, I will consider implementing a battery backup for the RAM. This could enable the development of specific applications. And most importantly, I hope that this time, given the chosen technique, the cartridge will work on more than just my MSX motherboard!

And the second topic is still my attempt to implement a Z80 CTC timer within these Trion FPGAs. The goal remains to successfully boot the processor core of the Drumulator in this FPGA. I implemented this part of the Drumulator in FPGAs a few years ago, but by simulating the CTC's operation—that is, by providing only the necessary IRQ vector for the display, without implementing the entire 'handshake' system during the Z80's interrupt handling phase.

A month ago, I decided to 'give it another shot' by asking an AI for an initial implementation. I got a project that, predictably, didn't work at all, but it greatly inspired my current code. After several days of trying to correctly implement the Z80's interrupt acknowledge sequence and the actual IRQ routine return, I finally have regular interrupt generation. For those who know, I now successfully have the passing of the interrupt vector, its handling by the Z80, and thus the clearing of the interrupt 'pending' status. At the end of the IRQ phase, the CTC correctly decodes the RETI, allowing new interrupts to occur.

All of that is perfect, but... well, the display of the emulated Drumulator still doesn't work.

That's where I am at the moment: trying to understand why the Drumulator isn't starting. I should eventually figure it out, especially since it worked flawlessly a few years ago with a pseudo-CTC.